1. Field of the Invention
The invention is related to field of semiconductor wafer fabrication systems and more specifically, to an apparatus and method for reducing particulate contaminants from adhering to or diffusing into a semiconductor substrate being processed on the apparatus.
2. Description of the Background Art
In the field of integrated circuit fabrication and manufacturing, chemical vapor deposition (CVD) is a well established technique for depositing thin films on semiconductor substrates (i.e. a silicon wafer). Typically, the wafer is introduced to a process chamber and the wafer is heated to a desired temperature to initiate the deposition process. Specifically, the wafer placed upon a pedestal heater. The pedestal heater contains one or more electrodes connected to a power source. When the power source is activated, a current is passed through the electrodes thereby heating the pedestal and subsequently the wafer.
A combination of inert carrier and reactant gases are introduced to the chamber. The elevated wafer temperature causes the reactive gases to break down on the wafer surface thereby depositing the desired film on the wafer surface. For example, the chemical vapor deposition of copper is achieved by using a precursor (reactant) known as Cupraselect, which has the formula Cu(hfac)L. The L represents a liquid base compound containing trimethylvinylsilane (TMVS). The (hfac) represents hexafluoroacetylacetonato, and Cu represents copper. During the CVD of copper, the precursor is vaporized and flowed with a carrier gas such as Argon into a deposition chamber containing a wafer. In the chamber, the precursor is infused with thermal energy at the wafer""s surface, and the following reaction results:
2Cu(hfac)Lxe2x86x92Cu+Cu(hfac)2+2Lxe2x80x83xe2x80x83(Eqn. 1)
The resulting copper (Cu) deposits on the upper surface of the wafer, along with the Cu(hfac)2 byproduct. The gaseous Lewis base byproduct (2L) is purged from the chamber. To maintain the desired chemical reaction, the desired temperature in the chamber and at the wafer surface must be maintained. Accordingly, the wafer is usually in direct contact at all time with the pedestal heater.
With the wafer in contact with the pedestal heater at all times, wafer processing can be negatively affected. For example at high temperature, the pedestal heater, usually aluminum, has a high coefficient of friction relative to the backside of the silicon wafer. Should the wafer shift on the pedestal heater, for example during transfer into and out of the chamber, the backside of the wafer would be scratched. At the elevated temperatures under which chemical vapor deposition occurs, scratching releases aluminum from the pedestal heater surface which then diffuses into the silicon of the wafer. Accordingly, unexpected contaminant particles are introduced into the silicon wafer. For example, conductive particles can short the semiconductor devices, i.e. gate structures that are created on the wafer surface. Likewise, non-conducting particles can increase the resistivity of conductive layers thereby degrading performance of the device.
Other conditions can also affect wafer processing. The inert and reactive gases can also leak into the lower regions of a process chamber during the fabrication process. If this condition occurs, deposition particles may undesirably form on the pedestal heater or on the backside of the wafer. As such, the wafer is further contaminated as well as the chamber components. Once contaminated, the wafer can transfer the contaminant particles to other chambers and/or a clean wafer entering the CVD chamber can become contaminated by the improperly coated chamber components. Additionally, if a wafer is not centered on the pedestal heater properly, the edge exclusion zone about the periphery of the wafer will vary. The edge exclusion zone is defined as the edge of the wafer which is not subjected to the semiconductor wafer fabrication process. The variations in the edge exclusion zone will ultimately lead to lower yield of the wafer.
Therefore, there is a need in the art for an apparatus and method of thin film deposition via CVD that can repeatably center (axially align) wafers on the pedestal heater prior to the deposition process as well as prevent backside scratching of the wafer and resultant diffusion of contaminant particles.
The disadvantages associated with the prior art are overcome with the present invention of a method and apparatus for reducing contamination of a substrate in a substrate processing system. The apparatus has a substrate support, a gas directing shield circumscribing the substrate support and a shadow ring disposed vertically above the substrate support and gas directing shield for retaining the substrate. The substrate support has two sets of ports for providing edge purge and backside purge gases. The gas directing shield and substrate support define an annular channel that is coincident with one set of ports to provide the edge purge gas. The edge purge gas imparts a force at the edge of a substrate resting on the substrate support that lifts the substrate off the substrate support and against the shadow ring. The shadow ring has an upper surface having an inner lip that extends radially inward and a plurality of centering tabs disposed below this inner lip. The centering tabs keep the substrate axially aligned with the substrate support and shadow ring. The shadow ring further has a plurality of conduits extending from its upper surface to its sidewall to provide a path for the edge purge gas to vent and to impede the flow of process gases under the backside and around the edge of the substrate.
In accordance with the present invention a method for reducing contamination of a substrate in a substrate processing system is also disclosed. The method includes the steps of providing a substrate upon the substrate support, applying a first flow of gas to a first set of ports to lift the substrate off the substrate support, centering the substrate upon the substrate support, and applying a second flow of gas to a second set of ports to establish and maintain thermal control of the substrate. The first flow of gas flows an edge purge gas through the annular channel defined by a gas directing shield circumscribed by a substrate support to force the substrate against a plurality of centering tabs disposed below an inner lip of a shadow ring. The second flow of gas flows a thermal transfer gas to a second set of ports in the substrate support for transferring thermal energy between the substrate support and a backside of the substrate. With the apparatus and method of the present invention, substrates such as semiconductor wafers can be processed without needlessly scratching the backside of the wafer or introducing such a surface to process contaminants. The annular channel gas flow lifts the wafer off the substrate support thereby reducing the likelihood of scratching due to the different rates of thermal expansion of the wafer and substrate support. Additionally, the annular channel gas flow is directed in such a manner as to control the edge exclusion zone on the wafer and reduce undesirable deposition on chamber components. The second flow of gas directly under the wafer not only impedes the flow of a reactant gas along the backside of the substrate to thereby reduce the amount of contaminants that can contact and deposit upon the backside of the wafer, but also provides the important thermal transfer medium to heat the backside of the wafer to an adequate process temperature.